Design of Register File for Negative Bias Temperature Instability

Design of Negative Bias Temperature Instability ( NBTI ) Tolerant Register File

Design of Negative Bias Temperature Instability (NBTI) Tolerant Register File

Modeling of Negative Bias Temperature Instability

After its discovery nearly forty years ago, negative bias temperature instability (NBTI) has again moved to the center of scientific attention as a significant reliability concern for highly scaled pMOSFETs. 3 The concern stems from the large number of unsaturated dangling bonds (Pb centers ) at the Si/SiO2 interface, which have to be passivated in order to avoid trapping levels in the bandgap....

Negative Bias Temperature Instability in CMOS Devices

This paper reviews the experimental and modeling efforts to understand the mechanism of Negative Bias Temperature Instability (NBTI) in p-MOSFETs, which is becoming a serious reliability concern for analog and digital CMOS circuits. Conditions for interface and bulk trap generation and their dependence on stress voltage and oxide field, temperature and time are discussed. The role of inversion ...

Controversial issues in negative bias temperature instability

In spite of 50 years of history, there is still no consensus on the basic physics of Negative Bias Temperature Instability. Two competing models, Reaction-Diffusion and Defect-Centric, currently vie for dominance. The differences appear fundamental: one model holds that NBTI is a diffusion-limited process and the other holds that it is reaction-limited. Basic issues of disagreement are summariz...

A Power Aware Cache and Register File Design Space Exploration